Yamanashi Lab.

Publication

Journal Paper

D. Saida, M. Hidaka, and Y. Yamanashi, “4-bit Factorization Circuit Composed of Multiplier Units with Superconducting Flux Qubits toward Quantum Annealing,” IEEE Trans. Appl. Supercond., vol. 35, no. 1, 1700111, Jan. 2025. (Open Access) DOI
Z. Han, N. Yoshikawa, and Y. Yamanashi, “Small-area Sorting Network Based on Unary Coding Using Single Flux Quantum Circuits,” IEEE Trans. Appl. Supercond., vol. 35, no. 5, 1400205, Aug. 2025. DOI
Z. Han, Z. Li, N. Yoshikawa, and Y. Yamanashi, “High area efficiency binary neural processing elements with time-domain signals using SFQ circuits,” Supercond. Sci. Technol., vol. 37, no. 4, 045014, Apr. 2024. DOI YUN-Repository
Z. Li, H. Shen, N. Yoshikawa, and Y. Yamanashi, “A binary neural computing unit with programmable gate using SFQ and CMOS hybrid circuit,” Supercond. Sci. Technol., vol. 37, no. 6, 065012, Jun. 2024. DOI YUN-Repository
R. Yamanaka, N. Yoshikawa, and Y. Yamanashi, “Implementation of Bayesian Network Based on Ultra-High-Speed Superconductor Random Number Generators,” IEEE Access, vol. 12, pp. 129081-129086, Aug. 2024. (Open access) DOI
Y. Yamanashi, H. Okumura, and N. Yoshikawa, “Stochastic matrix multiplier using superconductor single-flux-quantum circuit,” Supercond. Sci. Technol., vol. 37, no. 11, 115024, Nov. 2024. (Open Access) DOI
Y. Yamanashi, T. Hosoya, and N. Yoshikawa, “Reconfiguration of non-destructively readable superconductor memory by direct injection of magnetic flux to its storage loop,” Appl. Phys. Express, vol. 16, no. 4, 043002, Apr. 2023. (Open Access) DOI
Y. Yamanashi, T. Fujisawa, Z. Li, and N. Yoshikawa, “Asynchronous Single Flux Quantum Logic Gates Using Self-Clocking,” IEEE Trans. Appl. Supercond., vol. 33, no. 5, 1301105, Aug. 2023. DOI YNU-Repository
Z. Han, A. Li, Y. Yamanashi, and N. Yoshikawa, “Design of Max Pooling Operation Circuit for Binarized Neural Networks Using Single-Flux-Quantum Circuit,” IEEE Trans. Appl. Supercond., vol. 33, no. 5, 1301405, Aug. 2023. DOI YNU-Repository
T. Suzuki, K. Akizuki, Y. Yamanashi, and N. Yoshikawa, “Design and component demonstration of an SFQ complex event detector corresponding to the regular expression,” IEEE Trans. Appl. Supercond., vol. 33, no. 5, 1301705, Aug. 2023. DOI
H. Shen, N. Takeuchi, Y. Yamanashi, and N. Yoshikawa, “Amplitude-controllable microwave pulse generator using single-flux-quantum pulse pairs for qubit control,” Supercond. Sci. Technol., vol. 36, no. 9, 095010, Sep. 2023. DOI
N. Mizushima, N. Takeuchi, Y. Yamanashi, and N. Yoshikawa, “Adiabatic Quantum-Flux-Parametron Boosters for Long Interconnection and Large Fanouts,” Supercond. Sci. Technol., vol. 36, no. 11, 115021, Nov. 2023. DOI
H. Shen, N. Takeuchi, Y. Yamanashi, and N. Yoshikawa, “Design of a Timing Controller for a Superconductor Microwave Switch using Adiabatic Quantum Flux Parametron Circuits,” IEEJ Trans. Electr. Electron. Eng., vol. 142, no. 5, pp. 197-201, May 2022. DOI
Z. Li, Y. Yamanashi, and N. Yoshikawa, “Design of Binary Convolution Operation Circuit for Binarized Neural Networks Using Single-Flux-Quantum Circuit,” IEEE Trans. Appl. Supercond., vol. 32, no. 4, 1300305, Jun. 2022. DOI YNU-Repository
H. He, Y. Yamanashi, and N. Yoshikawa, “Implementing a Discrete Hopfield Neural Network Using a Single Flux Quantum Circuit,” IEEE Trans. Appl. Supercond., vol. 32, no. 4, 1300604, Jun. 2022. DOI YNU-Repository
K. Miyake, Y. Yamanashi, and N. Yoshikawa, “Boltzmann machine using superconducting circuits,” IEEE Trans. Appl. Supercond., vol. 32, no. 4, 1700205, Jun. 2022. DOI YNU-Repository
F. China, N. Takeuchi, H. Suzuki, Y. Yamanashi, H. Terai, and N. Yoshikawa, “A high-speed interface based on a Josephson latching driver for adiabatic quantum-flux-parametron logic,” IEICE Trans. Electron., vol. E105-C, no. 6, 264–269, Jun. 2022. DOI
D. Saida, M. Hidaka, K. Imafuku, and Y. Yamanashi, “Factorization by quantum annealing using superconducting flux qubits implementing a multiplier Hamiltonian,” Sci. Rep., vol. 12, 13669, Aug. 2022. DOI
D. Saida, M. Hidaka, K. Miyake, K. Imafuku, and Y. Yamanashi, Superconducting quantum circuit of NOR in quantum annealing,” Sci. Rep., vol. 12, 15894, Sep. 2022. DOI
K. Asai, N. Takeuchi, H. Suzuki, Y. Yamanashi, and N. Yoshikawa, “Transmission Line Effects of Long Gate-to-Gate Interconnections in Adiabatic Quantum-Flux-Parametron Logic Circuits,” IEEE Trans. Appl. Supercond., vol. 32, no. 7, 1301107, Oct. 2022. DOI
D. Takahashi, N. Takeuchi, Y. Yamanashi, and N. Yoshikawa, “Design and Demonstration of a Superconducting Field-Programmable Gate Array using Adiabatic Quantum-Flux-Parametron Logic and Memory,” IEEE Trans. Appl. Supercond., vol. 32, no. 7, 1301207, Oct. 2022. DOI
Y. Hironaka, T. Hosoya, Y. Yamanashi, and N. Yoshikawa, “Demonstration of Single-Flux-Quantum 64-bit Lookup Table with Cryo-CMOS Decoders for Reconfiguration,” IEEE Trans. Appl. Supercond., vol. 32, no. 8, 1301305, Nov. 2022. DOI
T. Hosoya, Y. Yamanashi, and N. Yoshikawa, “Compact Superconducting Lookup Table Composed of Two-Dimensional Memory Cell Array Reconfigured by External DC Control Currents,”IEEE Trans. Appl. Supercond., vol. 31, no. 3, 1300406, Apr. 2021. (Open Access) DOI YNU-Repository
S. Asada, Y. Yamanashi, and N. Yoshikawa, “Demonstration of an efficient single flux quantum logic circuit by introducing a local magnetic flux biasing,” Supercond. Sci. Technol., vol. 34, no. 5, p. 055007, May 2021. DOI YNU-Repository
D. Saida, N. Watase, and Y. Yamanashi, “Characterization of energy potential in tunable rf-SQUIDs with the classical regime toward precise design of superconducting flux qubit,” Jpn. J. Appl. Phys., vol. 60, no. 6, 060906, Jun. 2021. DOI
L. Shirakawa, Y. Yamanashi, and N. Yoshikawa, “Design and Evaluation of 2-bit-input Single-flux-quantum Autocorrelator System for Astronomical Data Analysis,” IEEE Trans. Appl. Supercond., vol. 31, no.5, 1300604, Aug. 2021. DOI YNU-Repository
D. Saida, Y. Yamanashi, M. Hidaka, F. Hirayama, K. Imafuku, S. Nagasawa, and S. Kawabata, “Experimental Demonstrations of Native Implementation of Boolean Logic Hamiltonian in a Superconducting Quantum Annealer,” IEEE Trans. Quantum Eng., vol. 2, 3103508, Aug. 2021. (Open Access) DOI
S. Nagasawa, M. Tanaka, N. Takeuchi, Y. Yamanashi, S. Miyajima, F. China, T. Yamae, K. Yamazaki, Y. Somei, N. Sega, Y. Mizugaki, H. Myoren, H. Terai, M. Hidaka, N. Yoshikawa, and A. Fujimaki, “Planarized Nb 4-Layer Fabrication Process for Superconducting Integrated Circuits and Its Fabricated Device Evaluation,” IEICE Trans. Electron., vol. E104-C, no.9, pp. 435–445, Sep. 2021. DOI
Y. Yamanashi, R. Kinoshita, and N, Yoshikawa, “Frequency synchronization of single flux quantum oscillators,” Supercond. Sci. Technol., vol. 34, no. 10, 105004, Oct. 2021. (Open Access) DOI YNU-Repository
Y. Hironaka, Y. Yamanashi, and N. Yoshikawa, “Demonstration of a Single-Flux-Quantum Microprocessor Operating With Josephson-CMOS Hybrid Memory,” IEEE Trans. Appl. Supercond., vol. 30, no. 7, 1301206, Oct. 2020. DOI
Y. Tsuna, Y. Yamanashi, and N. Yoshikawa, “Investigation of the Effects of 1/f Noise on Superconducting Circuits,” IEEE Trans. Appl. Supercond., vol. 30, no. 7, 1400404, Oct. 2020. DOI YNU-Repoditory
Y. Okuma, N. Takeuchi, Y. Yamanashi, and N. Yoshikawa, “Miniaturization of adiabatic quantum-flux-parametron circuits by adopting offset buffer,” Superconductor. Sci. Technol., vol. 32, no. 6, 065007, Jun. 2019. DOI
(Invited Paper) Y. Yamanashi, S. Nakaishi, and N. Yoshikawa, “Simulation of the Margins in Single Flux Quantum Circuits Containing π-Shifted Josephson Junctions,” IEEE Trans. Appl. Supercond., vol. 29, no. 5, 1301805, Aug. 2019. DOI YNU-Repository
A. Sanada, Y. Yamanashi, and N. Yoshikawa, “Study on Single Flux Quantum Floating-Point Divider Based on Goldschmidt’s Algorithm,” IEEE Trans. Appl. Supercond., vol. 29, no. 5, 13019045, Aug. 2019. DOI YNU-Repository
Y. Tomitsuka, Y. Yamanashi, N. Zen, M. Ohkubo, and N. Yoshikawa, “Demonstration of Picosecond Time Resolution in Double-Oscillator Time-to-Digital Converter using Single-Flux-Quantum Circuits,” IEEE Trans. Appl. Supercond., vol. 29, no. 5, 1301505, Aug. 2019. DOI
Y. Yamanashi, S. Nakaishi, A. Sugiyama, N. Takeuchi, and N. Yoshikawa, “Design methodology of single-flux-quantum flip-flops composed of both 0- and π-shifted Josephson junctions,” Supercond. Sci. Technol., vol. 31, no. 10, 105003, Aug. 2018. (Open Access) DOI YNU-Repository
Y. Yamanashi, H. Imai, and N. Yoshikawa, “Influence of Magnetic Flux Trapped in Moats on Superconducting Integrated Circuit Operation,” IEEE Trans. Appl. Supercond., vol. 28, no. 7, p. 1301105, Oct. 2018. DOI YNU-Repository
Y. Yamanashi, T. Matsushima, N. Takeuchi, N. Yoshikawa, and T. Ortlepp, “Evaluation of Current Sensitivity of Quantum Flux Parametron,” Supercond. Sci. Technol., vol. 30, no. 8, p. 084004, July 2017. DOI YNU-Repository
T. Wakamatsu, Y. Yamanashi, and N. Yoshikawa, “High-Speed Superconductive Decimation Filter for Sigma-Delta Analog to Digital Converter,” J. Phys. Conf. Ser., vol. 871, p. 012068, July 2017. (Open Access) DOI
R. Kihara, Y. Yamanashi, and N. Yoshikawa, “Power Reduction of Josephson Random Access Memory Using Stochastic Resonance,” IEEE Tras. Appl. Supercond., vol. 26, no. 8, p. 1301704, Dec. 2016. DOI YNU-Repository
R. Tsutsumi, K. Sato, Y. Yamanashi, and N. Yoshikawa, “Improvement of Operation Speed of LR-Biased Low-Power Single Flux Quantum Circuits by Introduction of Dynamic Resetting of Bias Currents,” IEEE Tras. Appl. Supercond., vol. 26, no. 8, p. 1301405, Dec. 2016. DOI YNU-Repository
Y. Yamanashi, K. Masubuchi, and N. Yoshikawa, “Statistical Analysis of Error Rate of Large-Scale Single Flux Quantum Logic Circuit by Considering Fluctuation of Timing Parameters,” Physica C, vol. 530, pp. 101-103, Nov. 2016. DOI YNU-Repository
Y. Yamanashi, S. Nishimoto, and N. Yoshikawa, “30 GHz Operation of Single-Flux-Quantum Arithmetic Logic Unit Implemented by Using Dynamically Reconfigurable Gates”, IEICE Trans. Electron., vol. E99-C, no. 6, pp. 692-696, June 2016. DOI YNU-Repository
S. Nishimoto, Y. Yamanashi, and N. Yoshikawa, “Design Method of Single Flux Quantum Logic Circuits Using Dynamically Reconfigurable Logic Gates,” IEEE Trans. Appl. Supercond., vol. 25, no. 3, p. 1301405, Jun. 2015. DOI YNU-Repository
K. Sato, Y. Yamanashi, and N. Yoshikawa, “High Speed Operation of Single Flux Quantum Multiple Input Merger Using a Magnetically Coupled SQUID Stack,” IEEE Trans. Appl. Supercond., vol. 25, no. 3, p. 1301605, Jun. 2015. DOI YNU-Repository
M. Otsubo, Y. Yamanashi, and N. Yoshikawa, “Optimization of SFQ logic gate considering dependence of its signal propagation delay on the bias voltage,” Physics Procedia, vol. 58, pp. 216-219, Sep. 2014. DOI
T. Ortlepp, M. Volkmann, and Y. Yamanashi, “Memory Effect in Balanced Josephson Comparators,” Physica C, vol. 500, pp. 20-24, May 2014. DOI
Y. Yamanashi and N. Yoshikawa, “Design and Evaluation of Magnetic Field Tolerant Single Flux Quantum Circuits for Superconductive Sensing Systems,” IEICE Trans. Electron., vol. E97-C, no. 3, pp. 178-181, Mar. 2014. DOI YNU-Repository
Y. Yamanashi, K. Umeda, and N. Yoshikawa, “Pseudo Sigmoid Function Generator for a Superconductive Neural Network,” IEEE Trans. Appl. Supercond., Vol. 23, no. 3, p. 1701004, Jun. 2013. DOI YNU-Repository
M. Otsubo, Y. Yamanashi, and N. Yoshikawa, “Improvement of Operating Margin of SFQ Circuits by Controlling Dependence of Signal Propagation Time on Bias Voltage,” IEEE Trans. Appl. Supercond., Vol. 23, no. 3, p. 1300504, Jun. 2013. DOI YNU-Repository
K. Aoki, Y. Yamanashi, and N. Yoshikawa, “Multiplexing Techniques of Single Flux Quantum Circuit Based Readout Circuit for a Multi-Channel Sensing System,” IEEE Trans. Appl. Supercond., Vol. 23, no. 3, p. 2500204, Jun. 2013. DOI YNU-Repository
Y. Tsuga, Y. Yamanashi, and N. Yoshikawa, “Asynchronous Digital SQUID Magnetometer with an On-Chip Magnetic Feedback for Improvement of Magnetic Resolution,” IEEE Trans. Appl. Supercond., Vol. 23, no. 3, p. 1601405, Jun. 2013. DOI YNU-Repository
Y. Yamanashi, I. Okawa, and N. Yoshikawa, “Design Approach of Dynamically Reconfigurable Single Flux Quantum Logic Gate,” IEEE Trans. Appl. Supercond., Vol. 21, no. 3, pp. 831-834, Jun. 2011. DOI YNU-Repository
T. Sugiura, Y. Yamanashi, and N. Yoshikawa, “Demonstration of 30 Gbit/s generation of superconductive true random number generator,” IEEE Trans. Appl. Supercond., Vol. 21, no. 3, pp. 843-846, Jun. 2011. DOI YNU-Repository
Y. Yamanashi, K. Umeda, and K. Sai, “Superconductive Combinational Logic Circuit Using Magnetically Coupled SQUID Array,” Physica C, Vol. 470, pp. 1546-1549, Nov. 2010.
Y. Yamanashi, T. Kainuma, N. Yoshikawa, I. Kataeva, H. Akaike, A. Fujimaki, M. Tanaka, N. Takagi, S. Nagasawa, and M. Hidaka, “100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm2 Nb Multi-Layer Process,” IEICE Trans. Electronics, Vol. 93-C, no. 4, pp. 440-444, Apr. 2010.
T. Sugiura, Y. Yamanashi, and N. Yoshikawa, “Statistical Evaluation of a Superconductive Physical Random Number Generator” IEICE Trans. Electronics, Vol. 93-C, no. 4, pp. 453-457, Apr. 2010.
Y. Yamanashi and N. Yoshikawa, “Superconductive Random Number Generator Using Thermal Noises in SFQ Circuits,” IEEE Trans. Appl. Supercond., Vol. 19, no. 3, pp. 630-633, Jun. 2009.
Y. Yamanashi, M. Tanaka, A. Akimoto, H. Park, Y. Kamiya, N. Irie, N. Yoshikawa, A. Fujimaki, H. Terai, and Y. Hashimoto, “Design and Implementation of a Pipelined Bit-Serial SFQ Microprocessor, CORE1b,” IEEE Trans. Appl. Supercond., Vol. 17, no. 2, pp. 474-477, Jun. 2007.
Y. Yamanashi, T. Nishigai, and N. Yoshikawa, “Study of LR-Loading Technique for Low-Power Single Flux Quantum Circuits,” IEEE Trans. Appl. Supercond., Vol. 17, no. 2, pp. 150-153, Jun. 2007.
Y. Yamanashi, T. Asano, and N. Yoshikawa, “On-chip Microwave Generator for Manipulation of Superconductive Quantum Bits,” Physica C, Vol. 445-448, pp. 967-970, Jul. 2006.
Y. Yamanashi, A. Akimoto, N. Yoshikawa, M. Tanaka, T. Kawamoto, Y. Kamiya, and A. Fujimaki, “A New Design Approach for Control Circuits of a Pipelined Single-Flux-Quantum Microprocessor,” Supercond. Sci. Technol., Vol. 19, no. 5, pp. S340-S343, Mar. 2006.
Y. Yamanashi, M. Ito, A. Tagami, and N. Yoshikawa, “Observation of Quantized Energy Levels in a Josephson Junction Using SFQ Circuits,” IEEE Trans. Appl. Supercond., Vol. 15, no. 2, pp. 864-867, Jun. 2005.
Y. Yamanashi, M. Ito, A. Tagami, and N. Yoshikawa, “High-speed Measurement Method of Quantized Energy Levels in Josephson Junctions Using SFQ Circuits,” Physica C, Vol. 412-414, part2, pp. 1546-1549, Jul. 2004.